Hello Everyone,
Does NOVA provide any intelligent affining of IRQs of PCI Devices to CPUs pinned to VMs? no i tried to enable this back in icehouse when i still worked at intel and
On Thu, 2021-06-24 at 20:09 +0000, Soares Sarto, Ricardo wrote: the redhat virt and kernel folk said that we shoudl not do this at the time.
i.e. for VMs that have pci-passthrough interfaces to PCI devices and are using ‘dedicated’ CPU policy, does NOVA automatically affine the IRQs for those PCI devices the CPUs that are allocated to the VM?
they objected to this proposal on the ground that if you have a real time guest you dont want the irqs to be delvied to the cpu cores on which the vm is running. you likely want them to be deliverd to the non pinned cores of the vm or to the same socket as the vm is pinned too but you do not want the irqs to interupt your realtime application cores. nova should not really be managing this lovel system config directly either. it might be approage for libvirt ot manage irq mapping but nova should not be directlly reconfiguring the irq mappings itself. this type of lowlevel system tuneing has generally been considered out of scope of nova to do which si why nova does not isolate pinned cores such that kernel and os process do not run on them. we direct operatros to use tuned or if you must the kernel isocpus parmater to do that. dymimic irq managment to me is to lowlevel a detail to be managed by nova directly unless libvirt elect to provide an interface for that. even then im not conviced we shoudl do this by default or direct them to the dedicated vm cores. as i said the opisite directing ircus to the shared cpus cores would seam more desirable.
Furthermore, is there any flavor extraspec that can further scope the IRQ affinity of the PCI Devices to a subset of the VM’s dedicated cpus?
no this does not exist.
If not, is this a new capability that the NOVA team would be open to?
for me this woudl be a -1 no. but other might be open to it. it has previouls been reject upstream about 6-7 years ago. this would one of the things that my team at intel at the time tried to enable when cpu pining, numa and neutorn sriov support was being added.
-rsoaress