<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">yup agree<div class=""><br class=""></div><div class="">We have spent more time thinking through FPGA and GPU but certainly all devices are possible. </div><div class="">Miroslav, you may recall in the isn examples I sent a while back I called them “programmable devices” ;-)</div><div class=""><br class=""></div><div class="">We may need to think about defining a crips line however between these managed devices versus anything attached by PCI, but maybe not. Up for discussion I think…</div><div class=""><br class=""></div><div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Dec 7, 2016, at 10:11 AM, Zhipeng Huang <<a href="mailto:zhipengh512@gmail.com" class="">zhipengh512@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class="">Hi Miroslav,<div class=""><br class=""></div><div class="">GPU and NVMe devices are definitely in my understanding within the scope of Cyborg, however we need a road map for each type of accelerator devices :)</div><div class=""><br class=""></div></div><div class="gmail_extra"><br class=""><div class="gmail_quote">On Wed, Dec 7, 2016 at 4:04 AM, Miroslav Halas <span dir="ltr" class=""><<a href="mailto:mhalas@lenovo.com" target="_blank" class="">mhalas@lenovo.com</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">





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<div class="m_6157038631759774198WordSection1"><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d" class="">Hello Harm,<u class=""></u><u class=""></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d" class=""><u class=""></u> <u class=""></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d" class="">Thank you for sharing. I was wondering if you have given any thoughts how other type of devices other than FPGAs would fit into this framework. For example,
 GPUs or block devices (such as NVMe drives) for exclusive access  by the VMs. Could these type of devices be also managed by cyborg?<u class=""></u><u class=""></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d" class=""><u class=""></u> <u class=""></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d" class="">Thanks,<u class=""></u><u class=""></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d" class=""><u class=""></u> <u class=""></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d" class="">Miro Halas<u class=""></u><u class=""></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d" class=""><u class=""></u> <u class=""></u></span></p>
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<div style="border:none;border-top:solid #b5c4df 1.0pt;padding:3.0pt 0in 0in 0in" class=""><p class="MsoNormal"><b class=""><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"" class="">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"" class=""> Harm Sluiman [mailto:<a href="mailto:harm.sluiman@gmail.com" target="_blank" class="">harm.sluiman@gmail.com</a><wbr class="">]
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<b class="">Sent:</b> Saturday, December 03, 2016 4:54 AM<br class="">
<b class="">To:</b> Zhipeng Huang<br class="">
<b class="">Cc:</b> OpenStack Development Mailing List (not for usage questions); <a href="mailto:rodolfo.alonso.hernandez@intel.com" target="_blank" class="">rodolfo.alonso.hernandez@<wbr class="">intel.com</a>; Michele Paolino; Scott Kelso; Roman Dobosz; Jim Golden; Miroslav Halas; <a href="mailto:pradeep.jagadeesh@huawei.com" target="_blank" class="">pradeep.jagadeesh@huawei.com</a>; <a href="mailto:michael.rooke@nokia.com" target="_blank" class="">michael.rooke@nokia.com</a>; <a href="mailto:jian-feng.ding@intel.com" target="_blank" class="">jian-feng.ding@intel.com</a>;
 <a href="mailto:martial.michel@nist.gov" target="_blank" class="">martial.michel@nist.gov</a>; Moshe Levi; Edan David; Francois Ozog; Fei K Chen; <a href="mailto:Jack.Ng@huawei.com" target="_blank" class="">Jack.Ng@huawei.com</a>; <a href="mailto:liliu1@huawei.com" target="_blank" class="">liliu1@huawei.com</a><br class="">
<b class="">Subject:</b> Re: [acceleration]Team Biweekly Meeting 2016.11.23 agenda<u class=""></u><u class=""></u></span></p>
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</div><div class=""><div class="h5"><p class="MsoNormal"><u class=""></u> <u class=""></u></p><p class="MsoNormal">Team I promised to comment on NASCA and provide some thoughts and ppt on flows for cyborg<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Sorry for the delay.<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal"><u class=""></u> <u class=""></u></p>
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<div class=""><p class="MsoNormal">I added a few words to the NASCA etherpad,<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal"><u class=""></u> <u class=""></u></p>
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<div class=""><p class="MsoNormal">I waited for cyborg git to drop ppt but no luck yet so I put it here on google drive. I hope you can reach it. follow it in show mode for a “rich” experience ;-)<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">I captured some FPGA run time flows as background, and then some sequences of lifecycle management. I have shared this with a few of you before.<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal"><a href="https://drive.google.com/open?id=0B_Dc7PdTARsxc2cwTlJnelctWHM" target="_blank" class="">https://drive.google.com/open?<wbr class="">id=0B_<wbr class="">Dc7PdTARsxc2cwTlJnelctWHM</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">I am creating etherpad to discuss<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal"><a href="https://etherpad.openstack.org/p/cyborg-initial-flow-discussion" target="_blank" class="">https://etherpad.openstack.<wbr class="">org/p/cyborg-initial-flow-<wbr class="">discussion</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">I am also creating an etherpad to discuss the in POC we have talked about for February to help define the scope of Cyborg<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal"><a href="https://etherpad.openstack.org/p/cyborg-initial-design-poc" target="_blank" class="">https://etherpad.openstack.<wbr class="">org/p/cyborg-initial-design-<wbr class="">poc</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">I would also like to intro/welcome a couple more people to the Cyborg topic<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Chen, Fei  (aka Fei) from IBM research and the SuperVessel project among other things<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Jack Ng and Li Liu, my colleagues from Huawei that will be participating in Cyborg and helping get our initial POC underway<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal" style="margin-bottom:12.0pt">Thanks for your time.<br class="">
<span style="font-family:"MS Mincho"" class="">宋哲</span><br class="">
Harm Sluiman<br class="">
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<div class=""><p class="MsoNormal">On Nov 23, 2016, at 11:49 PM, Zhipeng Huang <<a href="mailto:zhipengh512@gmail.com" target="_blank" class="">zhipengh512@gmail.com</a>> wrote:<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Hi team,<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Thanks for the discussion and please find the minutes here <a href="https://wiki.openstack.org/wiki/Cyborg/MeetingLogs" target="_blank" class="">https://wiki.openstack.<wbr class="">org/wiki/Cyborg/MeetingLogs</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">On Wed, Nov 23, 2016 at 8:38 PM, Zhipeng Huang <<a href="mailto:zhipengh512@gmail.com" target="_blank" class="">zhipengh512@gmail.com</a>> wrote:<u class=""></u><u class=""></u></p>
<div class=""><p class="MsoNormal">Forward here again in case you have not registered to openstack-dev mailinglist<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal" style="margin-bottom:12.0pt">---------- Forwarded message ----------<br class="">
From: <b class="">Zhipeng Huang</b> <<a href="mailto:zhipengh512@gmail.com" target="_blank" class="">zhipengh512@gmail.com</a>><br class="">
Date: Wed, Nov 23, 2016 at 8:34 PM<br class="">
Subject: [acceleration]Team Biweekly Meeting 2016.11.23 agenda<br class="">
To: "OpenStack Development Mailing List (not for usage questions)" <<a href="mailto:openstack-dev@lists.openstack.org" target="_blank" class="">openstack-dev@lists.<wbr class="">openstack.org</a>><br class="">
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<u class=""></u><u class=""></u></p>
<div class=""><p class="MsoNormal">Hi Team,<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Please find the meeting logistics and agendas at <a href="https://wiki.openstack.org/wiki/Meetings/CyborgTeamMeeting" target="_blank" class="">https://wiki.openstack.org/<wbr class="">wiki/Meetings/<wbr class="">CyborgTeamMeeting</a> <br clear="all" class="">
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<div class=""><p class="MsoNormal">Standard Engineer<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">IT Standard & Patent/IT Prooduct Line<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Huawei Technologies Co,. Ltd<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Email: <a href="mailto:huangzhipeng@huawei.com" target="_blank" class="">
huangzhipeng@huawei.com</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Office: Huawei Industrial Base, Longgang, Shenzhen<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">(Previous)<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Mobile Ad-Hoc Network Lab, Calit2<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">University of California, Irvine<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Email: <a href="mailto:zhipengh@uci.edu" target="_blank" class="">zhipengh@uci.edu</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Office: Calit2 Building Room 2402<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">IT Standard & Patent/IT Prooduct Line<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Huawei Technologies Co,. Ltd<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Email: <a href="mailto:huangzhipeng@huawei.com" target="_blank" class="">
huangzhipeng@huawei.com</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Office: Huawei Industrial Base, Longgang, Shenzhen<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">(Previous)<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Mobile Ad-Hoc Network Lab, Calit2<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">University of California, Irvine<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Email: <a href="mailto:zhipengh@uci.edu" target="_blank" class="">zhipengh@uci.edu</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Office: Calit2 Building Room 2402<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Email: <a href="mailto:huangzhipeng@huawei.com" target="_blank" class="">
huangzhipeng@huawei.com</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Office: Huawei Industrial Base, Longgang, Shenzhen<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">(Previous)<u class=""></u><u class=""></u></p>
<div class=""><p class="MsoNormal">Research Assistant<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Mobile Ad-Hoc Network Lab, Calit2<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">University of California, Irvine<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Email: <a href="mailto:zhipengh@uci.edu" target="_blank" class="">zhipengh@uci.edu</a><u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">Office: Calit2 Building Room 2402<u class=""></u><u class=""></u></p>
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<div class=""><p class="MsoNormal">OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado<u class=""></u><u class=""></u></p>
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</blockquote></div><br class=""><br clear="all" class=""><div class=""><br class=""></div>-- <br class=""><div class="gmail_signature" data-smartmail="gmail_signature"><div dir="ltr" class=""><div class=""><div dir="ltr" class=""><div class=""><div dir="ltr" class="">Zhipeng (Howard) Huang</div><div dir="ltr" class=""><br class=""></div><div dir="ltr" class="">Standard Engineer</div><div class="">IT Standard & Patent/IT Prooduct Line</div><div dir="ltr" class="">Huawei Technologies Co,. Ltd</div><div dir="ltr" class="">Email: <a href="mailto:huangzhipeng@huawei.com" target="_blank" class="">huangzhipeng@huawei.com</a></div><div dir="ltr" class="">Office: Huawei Industrial Base, Longgang, Shenzhen</div><div dir="ltr" class=""><br class=""></div><div dir="ltr" class="">(Previous)<br class=""><div class="">Research Assistant</div><div class="">Mobile Ad-Hoc Network Lab, Calit2</div><div class="">University of California, Irvine</div><div class="">Email: <a href="mailto:zhipengh@uci.edu" target="_blank" class="">zhipengh@uci.edu</a></div><div class="">Office: Calit2 Building Room 2402</div><div class=""><br class=""></div><div class="">OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado</div></div></div></div></div></div></div>
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